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NCP5890
Although the total ohmic resistance plays an important
role in the losses developed in the converter, the switching
losses are key when the operating frequency is beyond a
few kilohertz range. To minimize such losses, the internal
power NMOS is designed to minimize the dI/dt, thus
minimizing the I*V crossing time. As a consequence, the
slope of the positive going voltage ? VLX ? present at the Lx
pin is very fast as well and an overshoot is created since the
Schottky rectifier has an intrinsic turn-on time: the voltage
keeps going until the diode turns ? on, clamping the VLX
in Figure 6. The proposed Schottky, depicted in the
schematic Figure 1, is a good alternative to minimize such
an overshoot.
On the other hand, the same overshoot is propagated to
the Vout voltage when the system operates under open load
condition. As a consequence, it is strongly recommended
to implement a simple filter, built with a small footprint
resistor, to makes sure that no any uncontrolled operation
of the high sensitive pin Vos will happen under the worst
case conditions: see Figure 1, resistor R5.
voltage at the output value. Such a mechanism is depicted
Figure 6. Typical Turn On Time of the Schottky Rectifier
I2C Protocol
The standard I2C protocol is used to transfer the data
from the MCU to the NCP5890. Leaving aside the
Acknowledge bit, the NCP5890 chip does not return data
back to the MCU.
The physical address of the NCP5890 can be selected as
0111 001X or 0111 010X (the X being the Read / Write
identifier as defined by the I2C specification) depending
upon the digital status present at the I2CADR pin:
I2CADR = Low 3 address = %0111 0010 = $72
I2CADR = High 3 address = %0111 0100 = $74
In order to avoid any risk during the operation, the digital
level at the I2CADR pin must be hardwired either to GND
or to Vbat prior to power up the system.
To set up a new output current value, a full frame will be
sent by the MCU. The frame contains three consecutive
bytes and shall fulfill the I2C specifications (see Figure 7):
? First byte : I2C address, write 3 $72
(assuming I2CADR = Low)
? Second byte : register selection 3 %0000 XXXX =
internal register address
? Third byte : DATA 3 %XXXX XXXX = function /
output current value
An infinite number of register selection / data pair can be
send on the I2C port once the physical address has been
decoded (see Figure 8). The transmission ends when the
STOP signal is send by the SCL/SDA digital code.
The first byte of the I2C frame shall be selected address
($72 or $74) when a Write is send to the chip.
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